Intel EM64T Technology - Page 4

..:: REX Prefix - More Information ::..


Figure 4.

The second major aspect to allow for support of 64-bit operations is the modifications made to the instruction set. The bulk of these instructions have been modified to extend their support to 64-bit operations, while taking care not to limit their backwards compatibility with 32-bit operations. The most important of these changes is the addition of the REX instruction prefix.

In 64-bit mode, the default address size is 64 bits with a default operand size of 32 bits. With the REX prefix, these defaults can be overturned to allow for mixing of 32-bit and 64-bit data and addresses. This is done on an instruction-by-instruction basis, and offers the core support for 32-bit backwards compatibility.

In addition, these new REX instruction prefixes are utilized to specify the new 64-bit general purpose registers as well as the SSE registers, a 64-bit operand size, and the extended control registers. Not all of the instructions need a REX prefix, however. REX is only required if an instruction references one of the 64-bit registers or uses a 64-bit operand. Only one REX prefix is allowed per instruction, and it is sandwiched between the opcode byte and the legacy prefixes, as can be seen in Figure 4.

..:: Conclusion ::..

This article has really only scratched the surface when it comes to architecture modifications that have been made on the Intel platform to support 64-bit processing. If these features all look familiar, they should. These are all the same modifications that have been made by AMD for the AMD64 architecture, and now Intel has followed suit with their 6xx series Pentium 4 processors. In the coming weeks, we’ll be detailing some further modifications tat have been made to the IA-32 architecture, such as RIP-relative addressing, more instruction set changes, branches, stack pointer modifications, etc. Check back soon for more on 64-bit processing!