..:: Introduction ::..
It’s been quite some time since this much excitement and enthusiasm has swirled around the release of an Intel desktop processor. Sure, advancements along the Pentium 4 development route, like the move to dual core architecture, have yielded some excitement, but nothing along the lines of what has been seen as of late.
In the past all we had to look forward to from Intel was a processor that provided a decent performance boost, and consumed more power than before. AMD’s processors on the other hand offered more performance, and used far less power. In a world of ever increasing energy costs, AMD’s offerings have become more attractive to both industry, and to the general home user. Intel set out to develop an advanced microarchitecture to address these very issues, and with that research and development came the Intel Core microarchitecture.
..:: Intel Core Microarchitecture ::..
Intel’s Core microarchitecture is the new basis for their mobile, desktop and server processors. Intel optimized this new microarchitecture to deliver the most performance at the least power consumption level, a.k.a. the “performance-per-watt” phrase that Intel has been throwing around for several months. The Core microarchitecture takes several of the key microarchitectural benefits developed for the Pentium M, and melds them with proven desktop microarchitectural features to provide a high performance, low power product.
In the past, Intel operated on the common notion that all that mattered in the world of performance was the operating frequency of a processor. This was the way that the vast majority of consumers evaluated a processors “performance” versus a competing product, and Intel used this to their advantage. AMD was the first to address the operating frequency myth by toting the increase in instructions executed per clock cycle with their processors. While true that IPC is vital to describing the performance of a processor, it alone does not paint a complete picture. Thus, true performance is both a function of the operating frequency and the IPC. Intel’s Core microarchitecture addresses these issues with lowered frequency, but a much improved IPC.
Now, to optimize the new microarchitecture in terms of power, one key dynamic that Intel looked at is the “dynamic capacitance required to maintain IPC efficiency”. Dynamic capacitance, as defined by Intel, is the ratio of electrostatic charge on a conductor to the potential difference between the conductors required to maintain that charge. In other words, this is the switching capacitance of the transistor setup. Power is equal to the dynamic capacitance value times the square of the operating voltage times the frequency. In order to balance the power consumption in the Core microarchitecture, the designers took all of these vital values into account to find the best balance for IPC, Voltage, Frequency, and Capacitance. Intel developed five innovations for the Core microarchitecture to address both of the power and performance goals.