Intel’s Extended Memory 64 Technology, better known under the simple acronym EM64T, is Intel’s version of x86-64. The processors that feature support for EM64T will be backwards compatible with 32-bit systems, and also capable of taking advantage of the added memory and computational capabilities of 64-bit processing. EM64T is built off of the IA-32 architecture, with additional registers, instructions, and enhanced instructions. Processors that feature EM64T are also capable of running under multiple operating modes, depending on various system setup aspects, i.e. 32-bit Vs. 64-bit OS. These processors are also fully compatible with existing software meant for the original IA-32 architecture.

     With the addition of EM64T, Intel has added a new operating mode referred to as IA-32e. This operational mode also includes two sub-modes, compatibility & 64-bit. The IA-32e mode can only be entered if the processor is working off of a 64-bit capable operating system, such as Microsoft’s upcoming WindowsXP x64 Pro. If it were to operate under a standard 32-bit environment, i.e. WindowsXP, the processor would run in IA-32 legacy mode. In IA-32 legacy mode, the processor could be run in the three common sub-modes, those being Real Address, Protected, & Virtual 8086.

     When an EM64T capable processor operates under compatibility mode, it allows the bulk of legacy 16-bit and 32-bit applications to run without any need to be recompiled under a 64-bit environment. Under most circumstances, software developers would need to recompile their code with the latest version of Intel’s compiler, or another 64-bit capable compiler, to make their software take full advantage of the 64-bit capabilities. Those software developers who wish not to do so don’t risk having their software become incompatible due to this operational mode.

     Compatibility mode is controlled by the operating system, and is controlled on the basis of code segments within an application. This is the foundation of the 32/64-bit support architecture as both 32-bit and 64-bit applications could be running at the same time. Applications run under compatibility mode have limited access to the first 4GB of linear-address space, and are only able to utilize standard IA-32 instruction prefixes and registers. The operand and address sizes are also limited to the IA-32 standards of 16-bit and 32-bit.

     The final sub-mode of EM64T is 64-bit mode. As one would likely assume, 64-bit mode is utilized by 64-bit applications when they’re run under a 64-bit operating system. Intel has made several key changes to the IA-32 architecture to allow for these 64-bit applications, such as adding support for 64-bit linear addressing. Variations of the IA-32 architecture may not offer full 64-bit linear addressing, such as the processors we’ll be looking at today which offer support for 48-bit linear addressing. This issue will be covered in a more detailed nature when we discuss the memory organization under 64-bit mode.

     The main additions to the IA-32 architecture lie with the need for additional 64-bit registers. Intel has added eight new general purpose registers, along with eight 128-bit Streaming SIMD Extension registers. The pre-existing general purpose registers have all been widened to 64-bits as well. With these new registers comes a new opcode prefix, REX. The defaults for 64-bit mode allow for a 64-bit address size, and a 32-bit operand size. These defaults can be overridden by using the REX opcode prefix. The REX prefix allows for a 32-bit operand to be chosen when operating under 64-bit mode. The REX prefix is utilized on an instruction-by-instruction basis. In order to allow for support of these 32-bit operands under 64-bit mode, many of the pre-existing instructions have been changed, or redefined in order to utilize the 64-bit registers and 64-bit addressing. These modified instructions are where the REX prefix is utilized.

     In order to utilize the 64-bit instructions you will, of course, need a 64-bit instruction pointer. This instruction pointer is extended to 64-bits wide when operating under 64-bit mode, and contains the address of the next instruction to be executed. Without a 64-bit wide instruction pointer, the newly added instructions would be useless. Intel has also added an additional addressing mode, relative to the current address stored in the instruction pointer. This new addressing mode allows for the address stored within the instruction pointer register to be used as a base address for selecting other memory addresses. Relative addressing is typically used where previous address increments are of a known value, or where various address locations are broken up into different segments.

     The remaining features that are supported under the 64-bit operating mode are the use of flat address space with single code, data, and stack space, uniform byte-register addressing, a new interrupt priority control mechanism, and of course, support for greater than 64 GB of physical address support. This is one of the, if not the most important aspect of 64-bit capable processors right now. With 64-bit bit physical address support, you’re talking about over 200 TB of memory that could be utilized, far more than the current maximum of about 4GB, (some processors can currently address > 64 GB, but generally the maximum allowed is 4GB).